Determination of the coefficient of thermal expansion (CTE) of semiconductor materials is essential for predicting dimensional stability, thermal stress, and the long-term reliability of wafers, packages, and assembled devices. This technical article explains the principles, sample types, test items, measurement methods, and industrial applications of semiconductor CTE determination, with reference to recognized standards such as ASTM E831, ASTM E228, ASTM E289, and ISO 11359-2. Whether characterizing silicon wafers, ceramic substrates, or polymeric packaging materials, accurate CTE data from accredited third-party laboratories forms the foundation of sound thermal-mechanical design.
Technical Overview
The coefficient of thermal expansion (CTE) quantifies the fractional change in dimension of a material per unit change in temperature. The linear CTE is defined as the change in length per unit original length per kelvin of temperature change, commonly expressed in units of ppm/K or ppm/°C. In semiconductor engineering, CTE determination is a critical thermal-mechanical characterization activity because virtually every failure mode in packaging, including solder joint fatigue, die cracking, interfacial delamination, thin-film cracking, and warpage, is driven by CTE mismatch between adjacent material layers.
During device operation and qualification testing, semiconductor assemblies routinely experience temperature excursions spanning approximately -55°C to +175°C. Within this range, materials expand at very different rates, and the resulting stress accumulates at bonded interfaces with every thermal cycle. Typical reference values include silicon at approximately 2.6 ppm/K, silicon carbide at 4.0 to 4.6 ppm/K, gallium arsenide at approximately 5.7 to 6.9 ppm/K, sapphire at roughly 5 to 8 ppm/K depending on crystallographic orientation, aluminum nitride at approximately 4.2 to 4.7 ppm/K, alumina at approximately 6.5 to 7.5 ppm/K, copper at approximately 16.5 to 17.7 ppm/K, and organic laminates such as FR-4 at approximately 12 to 17 ppm/K below the glass transition. These differences of several parts per million per kelvin translate into measurable stress at micron-scale geometries, which is why precise CTE determination is indispensable.
Modern CTE determination is performed by accredited third-party laboratories and in-house reliability teams using standardized procedures published by standards organizations including ASTM International, ISO, JIS, and GB. The selection of method depends on sample geometry, material class, temperature range of interest, and the required measurement uncertainty.
Testing Samples
Semiconductor Wafers and Substrates
Wafers and polished substrates of silicon, silicon carbide, gallium arsenide, gallium phosphide, sapphire, and silicon-on-insulator (SOI) structures are sectioned into rectangular coupons suitable for dilatometry or thermomechanical analysis. Single-crystal materials may exhibit anisotropic expansion, so samples are often prepared with known crystallographic orientations and tested along both in-plane directions.
Ceramic and Composite Packaging Substrates
Alumina, aluminum nitride, silicon nitride, beryllium oxide, low-temperature co-fired ceramic (LTCC), and direct-bonded copper constructions are tested in both the as-fired and metallized conditions. Thick-film metallization and plating layers are evaluated either as part of the composite structure or as free-standing foils where feasible.
Metals and Alloys
Lead-frame alloys such as copper, copper-chromium, and iron-nickel controlled-expansion alloys, as well as heat spreaders, lids, tungsten, molybdenum, and solder alloys, are characterized over the full service temperature range, including cryogenic conditions where required.
Polymeric Packaging Materials
Epoxy molding compounds, underfills, die-attach adhesives, encapsulants, polyimide films, and printed circuit board laminates are tested in the cured state. Because these materials exhibit a distinct change in expansion rate at the glass transition, testing typically spans temperatures well below and above Tg to capture both regions.
Thin Films and Functional Coatings
Metallization layers, diffusion barriers, low-k dielectric films, passivation layers, and epitaxial compound semiconductor films are measured using specialized techniques such as high-temperature X-ray diffraction or temperature-dependent wafer curvature analysis, since conventional dilatometry cannot resolve a sub-micron film attached to a much thicker substrate.
Finished Components and Assemblies
Bare dies, packaged devices, ball grid array substrates, stiffeners, and bonded heterogeneous stacks can be evaluated for effective composite expansion behavior using non-contact optical methods that map full-field strain across the component.
Testing Items
Comprehensive CTE determination programs typically include the following measurable quantities:
- Mean (secant) linear CTE over one or more specified temperature intervals, for example 25°C to 150°C or -65°C to 150°C
- Instantaneous (tangent) CTE as a continuous function of temperature, reported as an expansion curve
- CTE below and above the glass transition temperature for polymeric materials, together with the Tg determined from the inflection point of the dimensional change curve
- In-plane versus through-thickness (out-of-plane) CTE for anisotropic materials such as laminates, LTCC tapes, and single crystals
- Volumetric CTE derived from directional expansion measurements where full volumetric behavior is required
- Cure shrinkage, post-mold shrinkage, and hygroscopic expansion effects distinguished from purely thermal expansion through sequential conditioning
- Thermal cycling expansion hysteresis, comparing heating and cooling curves to reveal residual stress relaxation and irreversible dimensional change
Testing Methods
Thermomechanical Analysis (TMA)
Thermomechanical analysis per ASTM E831 and ISO 11359-2 is the most widely applied method for semiconductor-related samples. A specimen of typically 2 to 10 mm across and 0.1 to 10 mm thick is placed on a quartz stage with a low-mass probe applying a small static force. The dimensional change is recorded while the sample is heated at a controlled rate, commonly 3 to 5 K/min, across a range that may extend from approximately -150°C to 600°C or higher with appropriate instrumentation. Displacement resolution on the order of 0.1 micrometer makes TMA well suited to thin substrates, molding compounds, and small die samples.
Push-Rod Dilatometry
Push-rod dilatometry per ASTM E228 employs longer specimens, typically 20 to 50 mm, measured against a calibrated reference system in a furnace capable of reaching 1000°C to 1600°C. This method offers excellent accuracy for bulk ceramics, alloys, and substrate materials and is calibrated using certified reference materials such as sapphire, copper, or borosilicate glass traceable to national metrology institutes. Corrected expansion data account for the expansion of the dilatometer itself and the differential expansion of the push-rod assembly.
Laser Interferometry
Interferometric determination per ASTM E289 measures dimensional change through the displacement of optical interference fringes, achieving sub-nanometer displacement resolution. This method is reserved for low-expansion materials and applications where measurement uncertainty below approximately 0.1 ppm/K is required, such as precision optical carriers, fused quartz components, and reference-grade materials used to calibrate other instruments.
High-Temperature X-Ray Diffraction
For single crystals and epitaxial thin films, high-temperature XRD tracks the lattice parameter as a function of temperature, yielding the crystallographic thermal expansion along specific crystal directions. This is the standard approach for epitaxial layers of gallium nitride, aluminum gallium nitride, and similar compound semiconductor films whose expansion behavior cannot be isolated mechanically from the growth substrate.
Wafer Curvature (Stoney) Method
Temperature-dependent wafer curvature measurement, analyzed using the Stoney relationship, extracts the product of film stress and expansion mismatch with the substrate. Combined with known elastic properties, this technique determines the effective biaxial CTE of deposited films such as low-k dielectrics, polyimides, and metal layers at wafer level.
Non-Contact Optical Strain Mapping
Digital image correlation and electronic speckle pattern interferometry provide full-field, non-contact strain measurement on packaged components and printed circuit assemblies during thermal ramping. These methods capture local expansion gradients around die edges, solder arrays, and material transitions that coupon-level testing cannot resolve.
Across all methods, quality practices include calibration against certified reference materials, testing under inert atmosphere when oxidation is a concern, specimen conditioning to remove absorbed moisture, verification of face parallelism, and measurement of at least duplicate specimens to establish repeatability.
Applications
Accurate CTE determination directly supports a wide range of semiconductor engineering activities:
- Package design and material selection, for example choosing aluminum nitride over alumina to better match silicon and reduce interfacial shear stress in power modules
- Reliability qualification and life prediction, where CTE mismatch data feed finite element simulations and Coffin-Manson type solder fatigue models used to estimate cycles to failure under temperature cycling profiles such as -55°C to +125°C
- Heteroepitaxial process development, managing strain, wafer bow, and crack formation in compound semiconductor growth on mismatched substrates
- Failure analysis, identifying CTE mismatch as the root cause of die cracking, delamination, popcorning in molded packages, and warpage-related assembly defects
- Incoming inspection and statistical process control of substrates, laminates, molding compounds, and lead-frame alloys to ensure batch-to-batch consistency
- MEMS design, where dimensional stability and predictable expansion govern resonator frequency stability, gap control, and thermal actuator performance
- Advanced packaging development, including flip-chip underfill optimization, through-silicon via stack design, fan-out redistribution, and heterogeneous integration roadmap decisions
FAQ
What sample dimensions are required for TMA testing?
Typical TMA specimens are 2 to 10 mm across with a thickness between 0.1 and 10 mm. The two opposing faces must be flat and parallel, and thin wafers can often be tested as-cut with careful edge preparation. Longer specimens are preferred for dilatometry to improve relative measurement accuracy.
What temperature range can be covered?
TMA measurements commonly span approximately -150°C to 600°C, while push-rod dilatometry extends from cryogenic temperatures up to 1000°C to 1600°C depending on the furnace and atmosphere. Most semiconductor qualification needs are covered between -65°C and 300°C, and test plans are tailored to the actual service environment of the device.
How is the CTE of a thin film measured when the substrate dominates?
Conventional dilatometry cannot isolate a sub-micron film, so dedicated techniques are used. Epitaxial films are measured by high-temperature XRD lattice parameter analysis, while deposited films on wafers are characterized by temperature-dependent curvature measurements interpreted through the Stoney equation, often combined with nanoindentation data for elastic modulus.
What measurement uncertainty can be expected?
For well-prepared specimens, push-rod dilatometry typically achieves uncertainties of a few percent of the measured value, TMA achieves approximately 5 to 10 percent for mean CTE, and interferometry reaches uncertainties below 0.1 ppm/K for low-expansion materials. Uncertainty improves with longer samples, slower heating rates, and calibration against certified reference materials.
Why do polymeric packaging materials show two different CTE values?
Below the glass transition temperature the polymer network is rigid and expands at a relatively low rate, while above Tg the increased segmental mobility produces a significantly higher expansion rate, often two to four times greater. CTE determination for molding compounds therefore reports alpha-one below Tg and alpha-two above Tg, together with the Tg itself, since both values influence package stress during reflow and operation.
How should anisotropic materials be tested?
Single crystals, laminates, and co-fired ceramics expand differently along different axes. Specimens are prepared along each principal direction and tested separately so that in-plane and through-thickness CTE values are reported independently, which is essential for accurate warpage and stress modeling.
Can finished packaged devices be tested?
Yes. Non-contact optical methods such as digital image correlation and speckle interferometry measure the effective composite expansion and full-field strain distribution of assembled packages during thermal ramps, revealing local mismatch effects at die edges and interconnect regions that cannot be captured by coupon testing alone.